With the world shifting to green energy, China's "3060 Dual Carbon" goal has become the playbook for global low-carbon development. Power bricks, as the core medium for shifting juice, have an efficiency level that directly decides whether energy-saving goals hit the mark. Recently, China, the EU, and the US have rolled out a fresh wave of energy efficiency rules, heavily cracking down on vampire draw (no-load power) and light-load efficiency, flipping the industry's competitive rulebook on its head. This shift isn't just forcing GaN and SiC chips into every blueprint. It's pushing the entire charging industry to move past the simple "wattage war" and step into a comprehensive upgrade balancing efficiency, reliability, and compatibility.
China’s mandatory national standard, GB 20943-2025, is set to drop on February 1, 2027. It cranks the applicable power limit all the way up to the kilowatt tier, locking in laptops, PCs, and server power supplies under a mandatory rule for the first time, using globally aligned testing to clear the path for low-carbon tech exports. Over in Europe, the EU Ecodesign Regulation (EU) 2025/2052 goes into full force on December 14, 2028. This new rule mandates USB Type-C/PD ports to force interoperability, turns the tricky 10% low-load efficiency into a must-pass benchmark, and adds a brutal torture test requiring power bricks to hold steady under 2.5kV surges. Meanwhile, the US is gearing up for its DOE Level VII standard by 2027, slicing standby power draw by another 25% (capping it at $\le 50\text{--}75\text{mW}$), while teaming up with the voluntary 80 PLUS Ruby tier to lock down the absolute efficiency ceiling for AI and high-density datacenter server power arrays.
Teardown and baseline tests from CAICT show that mainstream PD chargers on shelves today still face a massive gap in 10% low-load efficiency and 2.5kV surge resistance, making them a far cry from native compliance. Power supply brands need to align fast with global low-carbon targets by fine-tuning their circuit topologies, control algorithms, and SR (synchronous rectification) recipes, tapping third-gen semiconductors and low-power protocol silicon to kill light-load standby bottlenecks. Also, multi-port charger makers must overhaul their dynamic power allocation setups to survive the EU’s brutal parallel output testing, while locking down tighter component consistency across the supply chain. In this global compliance shuffle, only the brands that move early and adapt to these energy updates will flip the script, smashing through green trade barriers to rule the future low-carbon export market.
Related Articles：
1. SouthChip SC8808: High-Efficiency Charging Chip for Energy Storage
2. CIBF 2026 Exclusive Gallery： Hall 3 Battery & Energy Storage Highlights (Part 2)
3. ChargerLAB POWER-Z KM003C Showcases Panther Lake’s Energy Efficiency at Intel Event
